
#Transmit band Patch#
This paper approaches a novel design theory of Low noise amplifier using reconfigurable rectangular shaped slotted patch antenna for 10.3–14 GHz receiver applications.
#Transmit band software#
Keywords Software defined radio (SDR) Á Low noise amplifier (LNA) Á Complementary metal oxide semiconductor (CMOS) Á Microstrip antenna The best achievement of proposed co-design approach is reduced noise figure which is most suitable for SDR applications. This co-design approach is analysed considering the 50 X impedance matching throughout the design and simulated on the platform of ADS.v.12. The slotted antenna achieves S 11 of-19 dB at 26 GHz and covers frequency range of 20.1–27.8 GHz with good radiation and receiving patterns. A simulation result of LNA achieves S 11 of-21.4 dB with gain ranging from 7.4 to 21.3 dB over the wide-band of 19.1–28.8 GHz. A two-stage CMOS LNA design is simulated and layout is made using foundry design kit for the TSMC 65 nm CMOS process in ADS.v.12. In third architecture the slotted antenna is integrated with low noise amplifier in order to form a co-design approach in which series–parallel resonant network is used as a band pass filter between slotted patch antenna and LNA. In second architecture stage, a rectangular shaped microstrip antenna is designed and a slot of asymmetric cross shape is cut on the patch antenna. Firstly, a two stage CMOS CG–CS LNA is designed using a technique of series–parallel resonant network as an input matching network and as inter-stage matching network between CG and CS LNA. Three different architectures have been designed in this work. This co-design approach minimizes the chip area and noise and also improves integration system over the bandwidth of 8.6 GHz. The proposed work presents a co-design approach for a new asymmetric rectangular cross shaped slotted patch antenna with low noise amplifier that occupies 17.2–25.8 GHz wide-band for SDR applications.

At the same time, a good filtering gain response is realized. It demonstrates that the proposed antenna has a bandwidth of 3.5% and a gain of 6.0 dBi in a profile of 0.015 λ 0. A prototype operating at 3.0 GHz was fabricated and measured. Since no extra circuits are introduced, the proposed antenna is compact. The two shorted vias are used to further adjust the reflection coefficient and the gain performance of the antenna. The slots on the radiating patch provide another gain null in the upper transition band. The slots on the ground plane not only provide a gain null in the lower transition band, but also introduce a new low‐resistance resonance which is beneficial to widen the impedance bandwidth. The proposed antenna consists of a radiating patch, a ground plane, two pairs of slots respectively etched on the radiating patch and the ground plane, two shorted vias connecting the radiating patch and the ground plane. In this paper, a novel compact microstrip patch antenna with a boresight filtering gain response is proposed. Finally, tri-design of receiver system demonstrates a peak gain of 25 dB and noise figure of 2.8 dB using proposed method. A co-design of filter and patch antenna is also analyzed and integrated with CMOS LNA circuit. In addition, a theoretical analysis of three-stage CMOS LNA without using input-output matching network is done for the optimization of noise figure.

The simulation result of CMOS LNA shows an achievement of 3.8 dB noise figure, 15.8 dB gain and −28 dB of return loss using proper impedance matching network. A three-stage CMOS LNA design is simulated and layouted using 90 nm CMOS design kit in ADS.v.12. Moreover, the new tri-design technique heavily improves the overall system integration, minimizes the noise and reduces the chip area and thus saving overall cost of the system.

A three-stage CMOS LNA is designed and integrated with co-design of filter and rectangular microstrip antenna which relaxes 50 Ω impedance matching constraint for designing at 40 GHz. In this paper, the integration of antenna, filter and CMOS low noise amplifier (LNA) is proposed which provides a new tri-design receiver system for MMW communication networks.
#Transmit band full#
A full integration of single chip receiver system is remains to be a challenge in the area of millimetre wave (MMW) applications.
